A mass storage device, such as a hard disk drive (HDD), uses an ATA protocol through a physical interface such as IDE. Such a mass storage device has a controller that is integrated into the device itself. The ATA protocol is based on 8 bit registers (ATA task file) into which the command to be executed, together with the parameters needed, are written. The status of the device, as well as the possible error codes, is read from these registers. Payload data is traditionally also written to and read from these registers. Below is the list of the registers as described in the ATA specification.
When readWhen writtenCommand Block registersDataDataErrorFeaturesSector CountSector CountLBA LowLBA LowLBA MidLBA MidLBA HighLBA HighDeviceDeviceStatusCommandControl Block registersAlternate StatusDevice ControlThe absolute IO address of the above mentioned registers is specific to the environment to which the device is connected. There is a de facto standard address space for the IDE usage in the PC environment. For PC-Card implementation there is a multiple addressing scheme that can be used. However, for MMC implementation, it is desirable to keep the physical interface of the HS-MMC in conformity to these existing address mappings, if possible, in order to keep the driver implementation as close as possible to the existing IDE/ATA drivers.